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A Keepout in PCB design is a user-defined area or perimeter placed in the layout that copper objects cannot intersect. Typically included to control the area used by automated copper placement actions, such as polygon pours and interactive routing, a Keepout also represents an invalid location when manually placing copper objects.

Altium Designer allows for the creation and application of Keepouts with its support for Object Specific Keepouts. Placed Keepout objects can be configured to specify which type objects they apply to, such as tracks, copper areas, vias, and pads, which significantly enhances the flexibility and effectiveness of Keepouts.

Keepout objects of different types placed in a PCB design. Keepout objects placed on the Keep-Out Layer i. Keepouts are ideal for defining non-routable board regions such as electrically sensitive or high voltage areas , specifically exposed copper locations such as in Fiducials and Test Points, or mechanically incompatible areas such as mounting holes or the corners of a PCB. The configurable nature of Object Specific Keepouts also allows them to be placed over other objects when specific Keepout Restrictions have been assigned.

When set to restrict only Vias, for example, a Keepout can be placed over existing copper regions such as a Polygon Pour to control the extent of automated Via Stitching. A Keepout is placed in the editor design space from the Place » Keepout menu, where the nominated Keepout style Track, Fill, Region, or Arc will be placed on the currently active Layer. The related Keepout properties are:. In the below image, the two Keepout Fills have different Layer and object restrictions applied.

Example of two Keepout Fills placed on different layers of a PCB and configured to restrict placement of different object types. The inherent flexibility of Keepouts allows their use for a wide range of tasks to control PCB layouts. Since Keepouts can be overlaid, assigned to any signal layer such as Top or Bottom , and configured to reject specific objects, they can be used to tightly control Via Stitching and Polygon Pours , for example.

In the example PCB layout shown below, Keepout Fills have been added around the multilayer Pads in a region of potential high voltage, which needs to have sufficient electrical isolation from the pending ground-connected Polygon Pours. The Keepout Fills are set to Top Layer and configured to restrict only Copper objects, which will reject Polygon Pours, Fills and Regions while accepting existing tracks and pads, etc. Keepout Fills placed on the Keep-Out Layer and configured to be applied to copper objects only.

The above arrangement of Keepouts will force Polygon Pours placed on the signal layers in this case the Top and Bottom Layers to avoid all three Keepout areas. However, the top layer pads associated with the area of concern will not be provided with adequate clearance by the Top Layer Pour. In this case, further Keepouts can be added to the Top Layer so that its Polygon Pour will avoid all the related pads by a suitable distance. In the image shown below, another two Keepout Fills have been added to the Top Layer, which is displayed here in Single Layer mode for clarity.

Note that the Keepout coverage shown could have been created from a single Region, rather than two overlapping Fills. Keepout Fills placed on the Top Layer and configured to be applied to copper objects only. When the Polygon Pours are eventually added to the layout, the collection of Keepouts will control the pours to produce a different clearance shape for each layer around the region. Note that in this example, the clearance associated with Keepouts is greater than that for normal objects due to a custom Keepout Clearance Rule see below.

Polygon Pours avoid placed Keepout objects. The influence of the Keepout collection on the Polygon Pours can be seen clearly when the layout is viewed in Single Layer 3D mode, as shown below — Top Layer on the left and Bottom Layer on the right. In the example shown below, Keepout shapes have been added to the upper and lower left corners of the layout.

These are configured to restrict Via objects, which will prevent the automated Via Stitching from placing Vias within those perimeters. Keepout Regions configured to be applied to vias only. Along with avoiding existing Tracks, Pads and Vias, as is normally the case, the Via Stitching also avoids the Keepout shapes as determined by the applicable Clearance Rule.

The PCB after adding via stitching. The Keepout added to the component Footprint shown below is configured to restrict all objects, but allow tracks — therefore enabling Net connections in a layout where the component is used, while restricting the close placement of other object types.

As is the case for other object primitives, the current Electrical Clearance Rule will determine the clearance constraints for Keepouts — see Design » Rules. Ensure that the custom Keepout Clearance Rule is set to a higher priority than the existing global Clearance Rule.

As shown in the section of board layout, the track routed between the two pads avoids the Keepout region on the right by a larger margin than the Top Layer region left. An additional Clearance rule for Keepout objects can be created. Existing primitive objects on signal layers can be converted to Keepouts, on the same layer, using the Convert Primitives to Keepouts command Tools » Convert » Convert Selected Primitives to Keepout.

A primitive object can be converted to an equivalent Keepout object and vice-versa. The PCB List panel can be used to list, select and edit the Keepout object of the selected type — for example, Keepout Fills, as shown in the below List panel image. A standard Top Layer Fill the last listed is also shown for comparison. If all the Fills or other types of objects, such as Regions included in the design are assigned as Keepouts, then the PCB List panel will include the full set of Keepout object Restriction attributes.

Altium Designer is able to import design files from a wide range of other design tools using the automated conversion capabilities provided by the Import Wizard File » Import Wizard.

Keepout type objects that are included in PCB design files from other design tools, some of which are object-specific, are converted to Object Specific Keepouts by the Wizard, where possible. Correct Keepout interpretation also occurs during the IDF export process. Using Altium Documentation. Keepouts can be placed on all copper signal layers, excluding copper planes. When the currently active board layer is not compatible with Keepouts, the Place » Keepout command is not available grayed out.

Note that the approach to controlling Polygon Pour areas is used here as an example for placing and configuring Layer Specific Keepouts.

Keepout objects can be converted back to their equivalent non-Keepout primitive objects using the Tools » Convert » Convert Selected Keepouts to Primitives command. Note that the Keepout attribute listed in the PCB List panels is read-only since the Fill, in this case, is designated as a Keepout object. Similarly, the Net attribute for Keepout objects in the PCB List panel cannot be edited because Keepout objects, by definition, cannot be assigned to a Net.

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